Production drive electronics for the 2 m² and 10 m² decks. USD, landed at a US address, import duty in, sales tax out. Prices checked October 2026. Bench parts and wiring: parts page ↗ · bench wiring ↗.
hardware/tile20. TMC5240 (29 V) or TMC5241 (48 V) on the same board. ≈ $11 per column; ≈ $17 with encoders and the click-in parts.First build: Joerg's 3x3 on these boards. PCBWay order settings, the Digi-Key list, the bench dock, cables, wiring, bring-up steps and every board's files: Tile-20 3x3 kit ↗
| Part | Choice | Why |
|---|---|---|
| Board | Tile-20: 20 columns (4 × 5), 192 × 240 mm, 6 layers, under its motors, on the module's foot plate. ≈ $236 pilot, ≈ $219 production, landed (est.; parts $145 at 1k). 6 layers because the spine rods close the gaps between the channel blocks: the buses run on two inner layers under the blocks. Designed: hardware/tile20, ERC and DRC clean | A 44 × 50 half module is exactly 11 × 10 boards. One row = one bus = one supply. The mechanical module should be the same 4 × 5, so one module is one swap unit. 3 × 3 doesn't tile 44 × 50; Joerg's 3 × 3 is the test rig. |
| MCU | STM32G474RET6 (170 MHz, CAN FD, 512 KB flash, 128 KB RAM). Changed from the G431RBT6 on 2026-10-16 | The firmware needs ≈ 67 KB of RAM; the G431 has 32 KB. Same LQFP64 pin-out (checked pin by pin), same chip as the bench Nucleo; ≈ $3 more per board (est., get the quote). OpenBLT: port from its G4 demo. |
| Driver | TMC5240 × 20 (reel TMC5240ATJ+T: $5.75 at LCSC, 2,211 in stock; Digi-Key US $6.43). Run current 1.4 A; 2.0 A pending the bench test. Each channel also has a TMC5241 footprint: the 48 V build fits that instead | Same power stage as the TMC2240 (the driver the bench predictions assume), plus ramp generator, stall-stop and encoder input. The TMC5241 is not pin-compatible (5 × 7 mm QFN38), so both footprints sit side by side with their own decoupling. Lead time 11 weeks. |
| Bus | CAN FD 500 kbit/s + 4 Mbit/s data, TCAN1044 | Down: 48-byte target frame per board every 10 ms. Up: no position stream (the camera closes the loop); an event frame at once on a column fault or recovery, driver fault, E-stop or reset, plus a 100 ms heartbeat. ≈ 22–24 % bus load (36–41 % at 2 Mbit/s). Physics: status as slow as 200 ms lost nothing. |
| SPI | 20 drivers on the G474's 3 SPI buses (7 / 7 / 6) at 5.3 MHz. Speed written every 1 ms; each chip read every 10 ms, staggered | 32–38 datagrams per board per ms, ≈ 0.12–0.15 ms: no DMA or faster clock needed. Needs the firmware to estimate position between reads (simulated: < 0.01 mm error). Fixes the pin-out before layout; Joerg's 3 × 3 measures it first. |
| PC link | PEAK PCAN-USB X6 (6 channels), $1,194 at Grid Connect | In stock in the US; Linux SocketCAN driver. Powered from the 24 V logic rail. |
| Bootloader | OpenBLT ≥ 1.21 over CAN FD, node ID = slot ID from the row backplane (no DIP switch) | A failed update leaves the board in the bootloader; retry. ~3–5 s per board. GPL for prototypes; commercial licence before selling decks. |
| Power | 28.5 V motor rail, 1 × Mean Well RSP-1600-27 per row on 208/240 V (pot sealed); 24 V logic always on | Not 29 V or more: the brake must stay off at the rail's worst case (29.1 V) and come on below the SMBJ30A (32.5 V). The RSP-1600's trip is 35.2 V min (the RSP-1500's 31 V did not fit). Not 120 V: it derates to 1,274 W at 115 VAC. |
| Protection | Per board (in the board's BOM): brake chopper: a TLV3011B comparator at 30.9 V (29.9–32.0 V worst case) (works without firmware and without the drivers) → UCC27517 → 100 V MOSFET + 4.7 Ω 5 W resistor; 15 A / 58 V fuse (0997015.WXN, Keystone 3568 holder); SMBJ30A TVS; 100 µF / 63 V hybrid + 2 × 1 µF + 2 × 100 nF (100 V) at each driver. Per row: Pololu #3777 33 V shunt as a backup stage; feeder sized for 76 A (the supply's 135 % overload), no row fuse | Every clamp must sit below the supply's 35.2 V minimum over-voltage trip. In normal running every row draws power (holding alone ≥ 310 W), so the supply never sees reverse power. The risk is drivers switched off at speed: each column then generates 83.3 V per m/s − 1.4 V (32 V at 0.4 m/s, 44 V at 0.55, 49 V at 0.6; est.). The #3777 turns on at 32–34 V and carries only ≈ 8 A (33 V / 4.1 Ω). A row with half its columns switched off at 0.55 m/s pushes ≈ 10–35 A peak and ≈ 28 J (est.); 11 brakes at 30.9 V / 4.7 Ω ≈ 6.6 A each clamp ≈ 72 A per row. |
| 48 V option | TMC5241 (4.5–65 V, $8.62 at Digi-Key US) on a 48 V rail: the same Tile-20, fitted with the TMC5241s, brake at 52.6 V / 10 Ω, SMBJ54A, RSP-1600-48. ≈ $270 landed | Force headroom, not throughput: 1.6 × column force at 0.3–0.6 m/s, but no throughput gain above 0.55 m/s cruise (physics). ≈ $3 more per column. Hotter: ≈ 3.8 W per chip at 1.7 A, junction ≈ 116 °C with the foot-plate heat path and forced air (est.): measure first. |
| Safety | E-stop → UL-listed 2-channel safety relay: drops the PSUs' AC feed through 2 monitored contactors and the ENABLE line. ENABLE gates every DRV_ENn in hardware (not through the MCU); lifting a module opens the presence loop and the row head drops ENABLE and the row supply; 24 V logic stays on, so the brakes keep working | NFPA 79 + ISO 13849-1 PL d, mandatory from the 2 m² on. A licensed electrician wires it to the NEC. Stop category 0 or 1: risk assessment. |
| Encoder | NOVOSENSE MT6826SGT-AKD-R (newest MagnTek ABZ part, DS Rev 1.1, 2024-02) on a 24 × 24 mm board per motor (designed: hardware/tile20/encoder) + Radial 9049 magnet. LCSC: $2.39 at 100. ≈ $4.3–5.6 per column with board and cable, landed (est.), now in the totals | A/B = 1,000 ppr out of reset: no programming, ENC_CONST 3.2. 3.0–5.5 V, 10 µs delay, 30–1,000 mT, 1–3 mm gap. -AKD out of stock today; the same die as -STD (4,792 in stock, same price) needs one SPI write + EEPROM burn at end of line. Not on the Tile-20 itself: board bow (≈ 2.3 mm, est.) exceeds the gap tolerance. The BOM buys the -STD and programs it through the board's SPI pads. Runner-up MT6816CT-AKD ($1.77/1k, 52 in stock). |
| Health | Rear-shaft MT6826S per column into the TMC5240's encoder input | The chip flags lost steps; a tile summary goes over CAN FD. See health monitoring ↗. |
One module is one 4 × 5 tile: 20 motors, their encoder boards and cables, and the Tile-20 lying on the foot plate. A person lifts it out of the deck and drops a new one in; no tool, no cable. See it in 3D: column modules, Tile-20 tab ↗.
| Part | Detail |
|---|---|
| Guides and latch | The module drops onto two row rails along the row. A Ø8 and a Ø6 guide pin on diagonal corners centre it and key it (turned round it will not go down); they engage 6 mm before any contact. Two spring-ball detents hold it. |
| Power | 3 + 3 spring pins (11 A each) from the row busbars onto Ø4 mm pads; then the 15 A fuse. Cold swap: the motor bus is off whenever a pin mates or breaks. |
| Signals | CAN FD, 24 V logic (eFuse soft start), ENABLE, slot ID, presence loop on 11 short pins and 3 ground pins. |
| Boards | Tile-20 (192 × 240, 6 layers), encoder (24 × 24), backplane segment (384 × 34, 4 layers), row head / END (90 × 64). All ERC and DRC clean, with Gerbers, BOM and placement files for JLCPCB: hardware/tile20. |
| Changes for Joerg | Row rails along the row instead of bed rails across it; a 69 × 35 mm window, two guide bushings and two detent grooves in the foot plate; the lift method (a key at the row head, or the PC raises four corner columns to grip). |
| Stage | Hardware | What it proves | ≈ USD |
|---|---|---|---|
| 1 · TMC5240 dev kit | NUCLEO-G474RE + TMC5240-BOB + TBMA732 encoder, one column on the jig (bench Order 1) | Force vs speed at 1.4 and 2.0 A; hold when unpowered; the 33 V clamp on the 30 V line (the supply's output button is the stop); chip ramp follows the planner; lost-step flag from the encoder; health jig; then CAN FD + OpenBLT | ≈ 380; motors and screws bought |
| 2 · Joerg's 3x3 | 1 Nucleo + 9 BOBs + 9 TBMA732, 48 mm pitch (Order 2) | 3 SPI buses in one 1 ms tick (≈ 180–280 µs of 1,000, modelled); 9 columns on one MCU; wired E-stop with 9 braking | 509 + motors |
| 3 · Validation strip | 8 Tile-20 rev A pilot boards, 10 × 16 = 160 columns (480 × 768 mm), MT6826S on every motor, 1 RSP-1600-27 | Simulator vs strip, same scripted moves, by overhead camera: slide at 0.45–1.0 m/s, 90° turn, chute entry, heavy boxes, bags. MT6826S at 50 rev/s and ≈ 80 °C. CAN FD load (8 boards), OpenBLT, E-stop with 160 columns, board brake against the supply's over-voltage trip, camera-to-cap latency | ≈ 5.8k (est.) |
| 4 · 2 m² | 44 Tile-20 boards, ≈ 880 columns, 4 rows | The deck runs; 4–8 weeks of failure and health data before 10 m² | ≈ 39.7k |
The Octopus Pro + TMC2240 firmware build was retired (git tag pre-cleanup has it); its bench order was cancelled. Today's firmware is one STM32Cube build (firmware/dist/firmware_nucleo_g474re_cube.bin; the 3x3 rig: firmware_nucleo_g474re_3x3_cube.bin). Stage 3 uses 8 of the 11 pilot boards in the 2 m² budget; boards and motors carry over. Its cost: 8 boards ≈ $1.8k, 160 motors and screws ≈ $2.7k, 160 encoder boards ≈ $0.9k, 4 backplane segments + 2 row heads + 2 END plugs ≈ $0.4k (2 rows of 4 modules), supply $454 (estimates). The 2 m² E-stop kit and one #3777 go on the strip (the RSP-1500 has no output button), and rev A carries the board brake: the strip tests the production fix. Pass: measured latency within what the simulator's controller assumes; if not, rerun the simulator before the next order. 10 wide, not 5: a 280 × 230 mm item needs 362 mm to turn. Fewer pilots ready: 4 boards (10 × 8) for slide and turn only.
| Item | Qty | ≈ USD |
|---|---|---|
| Tile-20 rev A, JLCPCB turnkey, 35 % duty paid (est. $236 each; a US assembler ≈ $270–350) | 11 pilot + 35 | 10,900 |
| MT6826S encoder boards, one per motor (est. $5.6 each with cable, landed) | 920 | 5,160 |
| Row backplane segments (2 slots, Mill-Max spring pins, $85) + row-head and END boards | 26 + 5 + 5 | 2,330 |
| Mean Well RSP-1600-27 (Digi-Key 1866-4237-ND, $465.50; 2026-10-20) | 4 | 1,860 |
| Pololu #3777 33 V shunt, backup stage per row | 5 | 75 |
| PEAK PCAN-USB X6 (Grid Connect) | 1 | 1,190 |
| SWD programmer: ST-LINK V3MINIE + Tag-Connect cable | 1 | 85 |
| E-stop: IDEM safety relay, 2 × IronHorse 40 A contactors, 2 × E-stop stations (AutomationDirect) | 1 | 440 |
| 24 V logic supply (Mean Well NDR-240-24: 4 rows × 1.4 A max) | 1 | 60 |
| Busbars (12 × 6 mm Cu), row harnesses, guide pins and detents, wire, DIN rail (estimate) | — | 1,800 |
| Electronics | ≈ 23,900 | |
| Motors 17HS16-2004D (StepperOnline, 41.9 % duty) + Tr8x12 screws (≈ 52 % duty) | 920 | 15,800 |
| Total (no mechanics, no services below) | ≈ 39,700 |
hardware/tile20/REVIEW.md) by a PCB engineer; Joerg adds the row rails, foot-plate window, guides and detents.Power: ≈ 3.1 kW average, 5.5 kW peak from the wall. Two dedicated 208/240 V 30 A circuits (NEMA L6-30), 2 supplies each; ≈ $300–900 per circuit installed. Forced air under the deck.
| Bug in the first board | Pilot row first; Kraken fallback |
| Chip's ramp differs from the simulator | Measure on the dev kit in weeks 1–3 |
| Regeneration trips a supply (latches off at 35.2–41.9 V) | Rail 28.5 V; board brake at 30.9 V; the #3777 (32–34 V) is backup only. Test on the pilot row |
| 36 V driver limit: drivers off at speed give 44 V at 0.55 m/s (est.) | Board brake (≈ 70 A per row, est.) + SMBJ33A per board. No board brake: maxon DSR 70/30 per row at 30 V ($445–509 each), or #3779 at 30.5 V and ≤ 0.43 m/s cruise |
| Heavy boxes lose steps at 1.4 A (physics: 2.0 A halves it) | Bench speed-vs-load test at 1.4 and 2.0 A decides the preset |
| Columns drop and regenerate in an E-stop (screw back-drives) | Risk assessment decides: category 0 (now) or 1 (firmware ramp ≤ 0.2 s, then drop: delayed-output safety relay, quote), or a mechanical hold |
| Heat (more at 2.0 A: ≈ 3.2 W per driver, junction ≈ 103 °C, est.) | Board on the foot plate (thermal pad); forced air; thermal camera on the pilot |
| Spring-pin contacts under motor vibration | 3 pins per power pole, 2 per CAN line; vibration soak + contact resistance on the pilot |
| Frame change: row rails along the row (Joerg) | Agreed by the owner; Joerg adds rails, window, guides |
| 4 Mbit/s on our cables | Test on the pilot row; 2 Mbit/s plan B |
| Item | Qty | ≈ USD |
|---|---|---|
| Tile-20 rev B, JLCPCB, 35 % duty paid (est. $219 each; US assembler est. $188–220, get quotes) | 230 | 50,400 |
| MT6826S encoder boards (est. $4.3 each, landed) | 4,600 | 19,900 |
| Row backplane segments ($67) + row-head and END boards | 124 + 21 + 21 | 8,550 |
| Mean Well RSP-1600-27 (Digi-Key, $423.90 at 10+; 2026-10-20) | 22 | 9,330 |
| Pololu #3777 33 V shunt, backup stage per row | 22 | 320 |
| PEAK PCAN-USB X6 (or 5 × PCAN-PCIe FD 4-ch: $2,570) | 4 | 4,780 |
| E-stop: 5 zones (safety relay + 2 contactors each) + 6 stations | — | 2,030 |
| 24 V logic supplies (NDR-240-24, 20 rows × 1.4 A) | 5 | 300 |
| Busbars, fuses, cables, programmers, test fixture (estimate) | — | 5,400 |
| Electronics | ≈ 101,200 | |
| Motors + screws, US-warehouse bulk (placeholder price, quote needed) | 4,600 | 64,400 |
| Total (no mechanics, no services below) | ≈ 165,400 |
Power: ≈ 15.5 kW average, 27 kW peak from the wall. 208Y/120 V 3-phase subpanel, 100–125 A, supplies wired line-to-line and balanced 7/7/8 (≈ $3–8k installed). On 480 V-only buildings, add a ~45 kVA step-down transformer. ~14 kW of heat under the deck: ducted forced air.
| Tariffs change (exclusions end Nov 9 2026; a court ruling and new chip tariffs pending) | Budget a 47.5 % stress case; prefer a US assembler for rev B |
| US-bought chips sent to a China assembler pay duty again (≈ +$40/board) | China builds: JLC sources all parts. Consign chips only to a US assembler. |
| TMC5240 supply for 4,600 | Order early; ADI direct quote; TMC5241 as second source |
| Screw duty ≈ 52 %, or ≈ 80 % if classed as fasteners | Customs-broker classification before ordering 4,600 |
| 14 kW of power and heat | One supply per row; ducted air; tune hold current |
| Regeneration and the 35.2 V supply trip, 20 rows | Same board brake, TVS and fuse as rev A; the pilot's switch-off test sets the brake threshold |
| Customer site needs a safety label | NRTL field label or UL 508A panel before the first install |
| 17,600 crimps on bare motor leads | Ask StepperOnline for connectorised leads (JST XHP-4) in the bulk quote |
| Single-source chips (G474, TMC5240/5241, TPS26600, LMR51420, MT6826S) and Mill-Max pins (Digi-Key only) | Order early; LCSC pin second source for signals (needs a height re-check) |
| Who / what | For | ≈ USD |
|---|---|---|
| PCB engineer (US contract, $100–140/h) | Review of the Tile-20 package (schematics, layouts, REVIEW.md), manufacturing review, pilot results | 6–10k |
| Licensed electrician | 2 m²: two 240 V circuits. 10 m²: 3-phase subpanel, contactors, E-stop wiring, machine nameplate (NEC 670) | 0.6–1.8k / 3–8k |
| Machine-safety engineer | Risk assessment (ISO 12100 / ANSI B11.0) and E-stop review | ≈ 5.4k |
| NRTL field label (UL, Intertek, CSA) | Only before a customer install, or if the landlord, insurer or inspector asks | 3k+ |
| EMC pre-scan | Only for sales to non-industrial sites (FCC Part 15 Class A) | 0.8–1.5k |
| OpenBLT commercial licence | Before selling decks (quote only) | ≈ 3–6k? |
| Mechanics (Joerg) | Row rails along the row, foot-plate window and guide bushings, detents, lift key; encoder mount; airflow | — |
US rules instead of CE: NEC up to the machine's disconnect, NFPA 79 from there on, ISO 13849-1 for the E-stop. A prototype in your own lab is allowed as documented custom-made equipment (OSHA 1910.399): keep the risk assessment and test records.
A row is one CAN bus on a backplane. Six identical 2-slot segments run under the modules, bolted onto the row's two busbars. Nothing is relayed: the CAN pair runs past every slot, and each module's transceiver taps it with a stub of about 37 mm.
PEAK X6 ch (DB9) ─ ROW HEAD ─[GH 14]─ segment 1 ─[GH 14]─ segment 2 ─ … ─ segment 6 ─[GH 14]─ END plug 120 Ω split here 24 V, ENABLE, RUN/STOP, PSU remote slots 1-2 … 11-12 120 Ω split, ladder end, loop return motor power: two 12 × 6 mm busbars per row, under the backplane, one RSP-1600-27 per row
| Part | Detail |
|---|---|
| Each slot | 20 Mill-Max spring pins point up through the module's foot-plate window onto gold pads on the Tile-20: 3 × VM and 3 × 0 V (tall, from the busbars through two M3 bolts each), 3 × GND (tall), and 11 short signal pins: CAN_H × 2, CAN_L × 2, 24 V × 2, ENABLE, slot-ID tap and reference, and the presence loop pair. Ground and power touch first, the signals and the presence loop last. |
| Slot ID | One 1 kΩ resistor per slot forms a 12-step ladder from the row head's 2.48 V reference to the END plug's ground. Each module reads the ladder tap and the reference on two ADC pins; the ratio gives slot 1–12 = CAN node ID. Identical segments, no jumpers, no DIP switch. |
| Row head | DB9 from the PEAK channel (CiA 303-1), split termination, 24 V logic in (fuse, reverse diode, TVS), ENABLE from the safety relay through a RUN/STOP switch and the presence loop, the supply's remote input (contact closed = on), the slot-ID reference. The END plug is the same PCB with five parts. |
| Swap | Flip the row to STOP: ENABLE and the row supply go off, 24 V logic and the bus stay up. Lift the module out, drop the new one in, flip to RUN. Lifting a module without STOP opens the presence loop and does the same within about 50 ms. |
| Counts, 10 m² | 220 modules, 120 backplane segments (+4 spares), 20 row heads and 20 END plugs, 100 short GH jumpers, 4 PEAK X6 (20 of 24 channels used). |
| Stays | Portable core: frame protocol, safety latch, watchdog, homing rules, health logic. The main computer's software. |
| Done (dev kit) | TMC5240 driver: the chip's ramp follows the planner over SPI; stall-stop homing; encoder counts and lost-step flag from the chip. STM32Cube build; run on the bench 2026-10-16: SPI, init write + readback, a 120 mm stroke up and down at 0.8 A. |
| Done (3x3) | 9 columns on 3 SPI buses (polled; DMA later), 32-bit column masks, encoder counts per rev as a parameter (4,096 for the jig's MA732, 4,000 for the MT6826S). Simulated. |
| Done (Tile-20, host-tested) | STM32G474RET6 board layer (firmware/board/board_tile20.h, every pin checked: identical to the G431 map); one image for the 3 × 3 pilot and the full 4 × 5 (finds the fitted channels at boot); 20 chips on 3 SPI buses; one hardware enable for all drivers (per-column off = TOFF 0); drivers re-initialised when the motor rail returns; CAN FD (500 k / 4 Mbit/s) carrying the bench protocol, node ID from the slot-ID ladder; debug UART on PA2 / PA3. Not run on a Tile-20 yet. Still to do: OpenBLT port; CPU cuts so 20 columns fit the 1 ms tick (9 fit today). |
| Option | USD per column | Why not |
|---|---|---|
| BTT Kraken V1.1 (8 × TMC2160, CAN FD) | ≈ 22 landed | 2 m² fallback only (see above) |
| BTT Octopus Pro + 8 × TMC2240 (bench order cancelled) | ≈ 21 | Driver sockets, no fuse on the H723 version, poor fit |
| FYSETC Spider H7 | 16–17 | CAN terminator soldered onto every board |
| BTT Manta M8P V2 | ≈ 21 | Classic-CAN transceiver, not CAN FD |
| BTT EBB42 / SB2240 (1 axis each) | 27–39 | 24 V max; 870–4,400 bus nodes |
| MKS SERVO42D/E (per-motor, closed loop) | 16–21 | Closed firmware, no updates over CAN |
| CREAPUNK CLN17 V3 | 30–36 | Engineering sample; non-commercial licence |
| Duet 3 expansion boards, ADI TMCM-6214 | 45–127 | Price; tied to their own firmware |
| Katapult bootloader | — | Classic CAN only |
| Tile-20 (recommended) | ≈ 11 | Board cost per column, landed (estimate) |
Kraken is US-landed; the other rows are converted from Norwegian prices without China duty, so they are optimistic.
Prices exclude state sales tax; parts bought for resale or manufacturing may be exempt with a resale certificate.